S1C17554/564 16-bit single chip microcontroller 48-pin wafer-chip-scale package (wcsp) 10-bit a/d converter code-efficient architecture optim ized for the c language, single-cycle instruction high processing performanc e, serial ice, and built-in 16-bit risc pcu core s1c17 descriptions the S1C17554/564 is a compact 16-bit mcu that delivers high-speed, low power operation with large address space and on-chip ice. it integrates a/d conver ter and thus various analog-interface sensors are connectable. the ultra small power-saving 48-pin wcsp is most suitable for sensor-applied products that require low power consumption and high-speed processing. ? features the main features of the S1C17554/564 are listed below. model S1C17554 s1c17564 cpu cpu core seiko epson original 16-bit risc cpu core s1c17 multiplier/divider (copro) ? 16-bit 16-bit multiplier ? 16-bit 16-bit + 32-bit multiply and accumulation unit ? 16-bit 16-bit divider embedded flash memory capacity 128k bytes (for both instructions and data) erase/program count min. 1 time other ? read/program protection function ? an erasing/programming power supply (vpp) is required. ? allows on-board programming using a debugging tool such as icdmini. embedded ram capacity 16k bytes clock generator system clock source 2 sources (osc3/osc1) 3 sources (iosc/osc3/osc1) iosc oscillator circuit 2/4/8/12 mhz(typ.) internal oscillator circuit osc3 oscillator circuit 24 mhz (max.) crystal or ceramic oscillator circuit supports an external clock input. osc1 oscillator circuit 32.768 khz (typ.) crystal oscillator circuit supports an external clock input. other ? core clock frequency control ? peripheral module clock supply control i/o ports number of general-purpose i/o ports max. 40 bits (tqfp13-64pin package) max. 34 bits (wcsp-48 package) (pins are shared with the peripheral i/o.) max. 40 bits (pins are shared with the peripheral i/o.) serial interfaces spi 3 channels i 2 c master (i2cm) 1 channel i 2 c slave (i2cs) 1 channel uart 2 channels (irda1.0 supported) ir remote controller (remc) 1 channel universal serial interface (usi) 2 channels (usable as a uart, spi, or i 2 c) timers 16-bit timer (t16) 3 channels fine mode 16-bit timer (t16f) 2 channels 16-bit pwm timer (t16a) 4 channels clock timer (ct) 1 channel stopwatch timer (swt) 1 channel 1 seiko epson corporation
S1C17554/564 watchdog timer (wdt) 1 channel a/d converter conversion method successive approximation type number of analog input channels 4 channels (max.) resolution 10 bits interrupts reset interrupt #reset pin nmi watchdog timer programmable interrupts 23 systems (8 levels) power supply voltage core voltage (lvdd) 1.65 v to 1.95 v 1.65 v to 1.95 v (not required when the regulator is used.) i/o voltage (hvdd) 1.65 v to 5.5 v 2.0 v to 5.5 v (regulator used) 1.65 v to 5.5 v (regulator not used) analog voltage (avdd) 2.7 v to 5.5 v flash programming voltage (vpp) 7 v/7.5v regulator input voltage 2.0 v to 5.5 v output voltage 1.8 v other enables the system to operate with a 3.3 v or 5.0 v single power supply. operating temperature operating temperature range -40 c to 85 c current consumption (typ value, lvdd = hvdd = 1.8 v) sleep state 0.8 a (osc1 = off, osc3 = off) 1.2 a (osc1 = off, iosc = off, osc3 = off) halt state 2.7 a (osc1 = 32 khz, osc3 = off) 3.1 a (osc1 = 32 khz, iosc = off, osc3 = off) 16 a (osc1 = 32 khz, osc3 = off) 16 a (osc1 = 32 khz, iosc = off, osc3 = off) 3000 a (osc1 = off, osc3 = 8 mhz ceramic) 3000 a (osc1 = off, iosc = off, osc3 = 8 mhz ceramic) run state 4500 a (osc1 = off, iosc = 12 mhz, osc3 = off) a/d conversion 380 a (avdd = 3.6 v, 100 khz sampling, fsel[1:0] = 0x0, xpd[1:0] = 0x3) shipping form 1 tqfp13-64pin (10 mm 10 mm 1.0 mm, lead pitch: 0.5 mm) 2 die form (3.137 mm 3.137 mm, pad pitch: 140 m) 3 wcsp-48 (3.137 mm 3.137 mm 0.72 mm, ball pitch: 0.4 mm) 2 seiko epson corporation
S1C17554/564 ? block diagram S1C17554 cpu core s1c17 internal ram (16k bytes) flash memory (128k bytes) test circuit reset circuit in terrupt contro ller 16-bit timer (3ch.) fine m ode 16-bit timer (2ch.) uart (2ch.) spi (3ch.) i 2 c master i 2 c slave a/d con verter misc register clock register (with oscillators) clock timer stopwatch timer watchd og timer 16-bit pwm timer (4ch.) ir remote controller i/o 2 (0x5000-) i/o 1 (0x4000-) test #reset sin x , sout x , sclk x sdi x , s do x , spiclk x , #spiss x sda0, scl0 sda1, scl1, #bfr p xx remi, remo ex cl x , cap x , tout x osc1-2, osc3-4, fouta, foutb avdd ain x , #adtrg dcl k, dst2, dsio 32 bits 16 bits 8/16 bits 8/1 6 b it s interrupt system i/o prt/ po rt m ux cpu core s1c17 internal ram (16k bytes) flash memory (128k bytes) test circuit reset circuit in terrupt contro ller 16-bit timer (3ch.) fine m ode 16-bit timer (2ch.) uart (2ch.) spi (3ch.) i 2 c master i 2 c slave a/d con verter misc register clock register (with oscillators) clock timer stopwatch timer watchd og timer 16-bit pwm timer (4ch.) ir remote controller i/o 2 (0x5000-) i/o 1 (0x4000-) test #reset sin x , sout x , sclk x sdi x , s do x , spiclk x , #spiss x sda0, scl0 sda1, scl1, #bfr p xx remi, remo ex cl x , cap x , tout x osc1-2, osc3-4, fouta, foutb avdd ain x , #adtrg dcl k, dst2, dsio 32 bits 16 bits 8/16 bits 8/1 6 b it s interrupt system i/o prt/ po rt m ux 3
S1C17554/564 s1c17564 cpu core s1c17 internal ram (16k bytes) flash memory (128k bytes) test circuit reset circuit interrupt controller 16-bit timer (3ch.) fine mode 16-bit timer (2ch.) uart (2ch.) spi (3ch.) i 2 c master i 2 c slave a/d converter misc register clock register (with oscillators) clock timer stopwatch timer watchdog timer 16-bit pwm timer (4ch.) ir remote controller i/o 2 (0x5000-) i/o 1 (0x4000-) test #reset sinx , sout x , sclk x sdi x , sdo x , spiclk x , #spiss x sda0, scl0 sda1, scl1, #bfr p xx remi, remo excl x , cap x , tout x osc1-2, osc3-4, fouta, foutb avdd ain x , #adtrg dclk, dst2, dsio 32 bits 16 bits 8/16 bits 8/16 bits interrupt system i/o prt/ port mux regulator vin, vout, regen ir remote controller us_sdi x , us_sdo x , us_sck x , us_ssi x notice: no part of this material may be reproduced or duplicated in any fo rm or by any means without the written permission of seiko ep son. seiko epson reserves the right to make c hanges to this material without notice. se iko epson does not assume any liability of a ny kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, furt her, there is no representation that this material is app licable to products requiring high level reli ability, such as, medical products. moreov er, no license to any intellectual property rights is granted by implication or ot herwise, and there is no representation or warranty that anythi ng made in accordance with this material will be free from any patent or copyright infringement of a third party. when exporting the produ cts or technology described in this material, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. you are requested not to us e, to resell, to export and/or to otherwise dispose of the pr oducts (and any technical information furnished, if any) for the development and/or manufacture of weapon of mass destruction or for other military purposes. all brands or product names mentioned herein are trademarks and/ or registered trademarks of t heir respective companies. ? seiko epson corporation 2013 all rights reserved seiko epson corporation epson semiconductor website http://www.epson.jp/device/semicon_e/ ic sales & marketing department 421-8 hino, hino-shi, tokyo 191-8501, japan phone: +81-42-587-5814 fax: +81-42-587-5117 microdevices operations division document code: 411827101 first issue april, 2010 revised au g , 2013. 4
|
